Microelectronic assemblies generally include one or more ICs, such as for example one or more packaged dies (“chips”) or one or more dies. One or more of such ICs may be mounted on a circuit platform, such as a wafer such as in wafer-level-packaging (“WLP”), printed board (“PB”), a printed wiring board (“PWB”), a printed circuit board (“PCB”), a printed wiring assembly (“PWA”), a printed circuit assembly (“PCA”), a package substrate, an interposer, or a chip carrier.
Conventional interconnecting of an IC to a circuit platform has one or more issues with respect to dual finish substrates for bonding of wire bond wires, such as a BVA™ wire bond wires for example. Some substrates may have organic solderability preservatives (“OSPs”) as a surface finish to a PCB to ensure solderability. Along those lines, OSPs are used as a surface finish to a PCB to resist oxidation thereof and to ensure solderability to copper pads thereof of low melting point interface layer materials for subsequent interconnection. An OSP finish is a transparent organic complex film that coats onto a copper surface to prevent corrosion.
Copper pads of a PCB may have thereon a layer of nickel followed by a layer of palladium or other combination of interface layers. Such metal interface layers on such copper pads may be used to ensure proper interconnection, including interconnection at a lower temperature, as well as providing a migration barrier for some applications. Effectively, such one or more interface layers may melt at a lower melting point than copper, so as to provide interconnections via soldering with a lower thermal budget. Furthermore, such one or more interface layers may more readily adhere to wire bond wires. In the past, these additional interface layers have allowed for stitch bonding to a PCB using wire bond wires, where such stitch bonding provides a reliable interconnection and is performed within a thermal budget of such a PCB.
Accordingly, it would be desirable and useful to provide bonding of wire bond wires to pads of a substrate platform that avoids having to have one or more interface layers.